Ahmad Saghafi

         

         M.Sc. Electrical Engineering – Circuits and Systems

         Department of Electrical and Electronic Engineering

         Malek Ashtar University of Technology, 15875-1774, Iran 

 

         School of Electrical and Computer Engineering

         University of Tehran, 14395-1465, Iran

         Tel (SILab at UT): +98 21 880 13196

         Email:

         Personal Homepage: http://ece.ut.ac.ir/silab/asaghafi/

         CV [PDF] 

 


        Short Biography

Ahmad Saghafi was born in December 1979 in Tehran, Iran. He received the B.Sc. degree in Electrical Engineering in July 2003 from Semnan University, Semnan, Iran. From September 2003 to October 2006, he was an M.Sc. student of Electrical Engineering at Malek Ashtar University of Technology, Tehran, Iran. In December 2004, he joined the "Silicon Intelligence and VLSI Signal Processing Laboratory" at the University of Tehran as a graduate research assistant and started working on his master thesis entitled "Design of Baseband Section of a Coherent UWB Receiver" under the direct supervision of Prof. Sied Mehdi Fakhraie. His research interests include design and implementation of VLSI signal processing and communication systems, signal processing for communications, and ultra-wideband system design. He has served as TPC member and reviewer in several international conferences and has been a student member of IEEE since January 2005.

 

        Education

             2003 – 2006:   M. Sc., Electrical Engineering, Malek Ashtar University of Technology, Tehran

                          Thesis Title:         Design of Baseband Section of a Coherent UWB Receiver [Abstract (English)]

                        Advisor:              Dr. S. Mehdi Fakhraie, Associate Professor, email: fakhraie@ut.ac.ir

             1998 – 2003:   B. Sc., Electrical Engineering, Semnan University, Semnan

                        Project Title:         Design and Fabrication of a 12-Pulse Cycloconverter for AC Motor Speed Control

                       Advisor:               Dr. Saeed Mirzaei, Assistant Professor

             1997 – 1998:   Pre-University, Mathematics and Physics, Shahid Akhtari School, Tehran

             1994 – 1997:   Diploma, Mathematics and Physics, Adl Parvar High School, Tehran


        Research Interests

•   Design and Implementation of VLSI Signal Processing and Communication Systems

•   Development of Algorithms for Wireless Communications

•   Application of UWB Communication Systems in WPANs, WSNs, and SoC Interconnections Design

•   VLSI/FPGA Implementation of DSP Systems

•   Computer Aided Design of Digital Integrated Circuits and Systems

•   HW/SW Codesign and Embedded Systems Design

•   RF Integrated Circuit Design for Emerging Wireless Communication Systems


        Research and Work Experience

            Dec. 2004 – Oct. 2006: Research Assistant, Silicon Intelligence & VLSI Signal Processing Lab., School of ECE, University of Tehran, Iran

            May 2006 – July 2007: Research Assistant, Research Institute of Advanced Technologies in Automotive Industry, Tehran, Iran

            Oct. 2005 – Mar. 2006: Instructor, Pishro Noavaran Kavosh Co., Tehran, Iran

            Dec. 2001 – July 2003: Research Assistant, Electronics Design Lab., Department of ECE, Semnan University, Semnan, Iran

            Aug. 1995 – Oct. 1996: Software Developer, Dana Pazhoohesh Ertebat Co., Tehran, Iran


        Teaching Experience

            Instructor, Department of Engineering, Islamic Azad University, Shahre Rey, Iran            

    •   Fall 2007 to present: Junior-Level Course, Digital Logic Circuits

    •   Fall 2008: Junior-Level Course, Electronic Circuits

    •   Fall 2007 to present: Junior-Level Course, Technical English

    •   Fall and Spring 2007: Junior-Level Course, Digital Logic Circuits Laboratory

Instructor, Department of Electrical Engineering, Shahid Sattari Aviation University, Tehran, Iran

    •   Fall 2007 to Fall 2008: Junior-Level Course, Electrical Measurement Laboratory

Instructor, Kanoon Danesh Anformatik, Tehran, Iran

    •   July 1999 to Sep. 2004: Some ICDL Courses, including Using Windows and Word Processing and Using Internet (summer only)

Teaching Assistant, Department of Electrical and Computer Engineering, Semnan University, Semnan, Iran

    •   Spring 2002: Junior-Level Course, Electric Circuit Theory


        Publications

            Manuscripts in Progress             

1. A. Saghafi and S. M. Fakhraie, “Two-Stage Search Space Reduction Algorithm for UWB Signal Acquisition,” submitted to IEEE Transaction on Wireless Communications in May 2008. 

            Journal Papers

1. M. Hamzeh, H. R. Mahdiani, A. Saghafi, S. M. Fakhraie, and C. Lucas, “Computationally Efficient Active Rule Detection Method: Algorithm and Architecture,” accepted for publication in Fuzzy Sets and Systems (FSS), 2008.

            Conference Papers

2. A. Saghafi and S. M. Fakhraie, “Optimized Baseband Design of an Ultra-Wideband Impulse Radio Receiver,” in Proc. IEEE Intl. Conf. Ultra-Wideband (ICUWB'07), Singapore, Sep. 2007, pp. 805–808.

3. A. Saghafi and S. M. Fakhraie, “An Exact Analysis of the Linear Serial Acquisition for Ultra-Wideband Communication Systems,” in Proc. IEEE Intl. Conf. Ultra-Wideband (ICUWB'07), Singapore, Sep. 2007, pp. 880–883.

4. A. Saghafi and S. M. Fakhraie, “A New Search Space Reduction Technique for Acquisition of UWB Signals in Multipath Channels,” in Proc. IEEE Vehicular Technology Conf. (VTC'07), Dublin, Ireland, Apr. 2007, pp. 1559–1563.

5. A. Saghafi and A. Nabavi, “An Ultra-Wideband Low-Noise Amplifier for 3–5-GHz Wireless Systems,” in Proc. Intl. Conf. Microelectronics (ICM'06), Dhahran, Saudi Arabia, Dec. 2006, pp. 20-23.

6. A. Saghafi and S. M. Fakhraie, “Rapid Acquisition of Ultra-Wideband Signals in Multi- path Environments,” in Proc. IEEE Asia Pacific Conf. Circuits and Syst. (APCCAS'06), Singapore, Dec. 2006, pp. 1818–1821.


        Presentations

            Local

1. Design of Baseband Section of a Coherent UWB Receiver, M.Sc. Thesis, Malek Ashtar University of Technology, Tehran, Iran, Oct. 2006. [Download]

2. Baseband Design of an Ultra-Wideband Radio Receiver (Simulations and Analysis), Silicon Intelligence and VLSI Signal Processing Lab., Jul. 2006. [Download]

3. An Overview of Ultra-Wideband Systems, and Using Simulink for System Modeling, Silicon Intelligence and VLSI Signal Processing Lab., Feb. 2006. [Download]

4. A Survey on Ultra-Wideband Standard and Research Activities, M.Sc. Seminar, Malek Ashtar University of Technology, Tehran, Iran, Jul. 2005. [Download]

5. An Overview of Ultra-Wideband Systems and Challenges Ahead, Silicon Intelligence and VLSI Signal Processing Lab., Jul. 2005. [Download]


        Thesis Abstract

Ultra-wideband (UWB) radio is a promising technology for low-cost, high-rate communications at short ranges. However, high bandwidth and low power of the UWB signals impose some difficult challenges in signal processing and implementation of the receiver. In this thesis, we have designed the most important parts of a coherent UWB receiver with the purpose of performance improvement and complexity reduction. Specifically, a new method for acquisition of UWB signals in multipath noisy channels is introduced which significantly reduces the mean acquisition time while adds no additional complexity. The performance of the proposed method is analytically evaluated and the results are validated through computer simulations. One of the most important bottlenecks in the design of low-power UWB receivers is channel estimation. An improved method for channel estimation with low computational complexity is proposed. Although, the estimation precision of the method is lower than the conventional methods, it can be implemented with much less complex hardware. In order to efficiently implement the receiver, we have analytically investigated the effects of quantization noise introduced by analog to digital converter and other internal fixed-point operations. Using the analysis, the optimum values for bit width of the internal signals and operations are exploited. For the simulations we performed in this thesis, a complete fully parameterized model of the system including transmitter, multipath noisy channel, and receiver is designed using the C S-Function capability of the MATLAB/Simulink software. A bit-true model of the important parts of the receiver is also designed to evaluate the effects of finite word-length and to validate the results of our quantization noise analysis.


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